Chemical mechanical Polish (CMP) processes are widely used in the fabrication of integrated circuits. When an integrated circuit is built up layer by layer on the surface of a semiconductor wafer, CMP processes are used to planarize the topmost layer to provide a planar surface for subsequent fabrication steps. CMP processes are carried out polishing the wafer surface against a polish pad. A slurry containing both abrasive particles and reactive chemicals is applied to the polish pad. The relative movement of the polish pad and wafer surface coupled with the reactive chemicals in the slurry allows the CMP process to planarize the wafer surface by means of both physical and chemical forces.
CMP processes can be used for the fabrication of various components of an integrated circuit. For example, CMP processes may be used to planarize inter-level dielectric layers and inter-metal dielectric layers. CMP processed are also commonly used in the formation of the copper lines that interconnect the components of integrated circuits.
After a CMP process, the surface of the wafer, on which the CMP process has been performed, is cleaned to remove residues. The residues may include organic matters and particles. In recent generations of integrated circuits, the sizes of the integrated circuit devices are reduced to a very small scale. This posts a demanding requirement to the post-CMP cleaning than for older generations of integrated circuits. For example, the sizes of the metal particles that remain after the post-CMP cleaning cannot exceed a half of the critical dimension (the gate length) of the transistors on the wafer. Obviously, with the reduction of the sizes of the integrated circuit devices, such requirement is tightened.
In the post-CMP cleaning, brushes were used to remove the residues on the wafers. After the post-CMP cleaning, wafers are inspected, for example, by determining the brightness of the cleaned wafer to determine whether there is residue left or not.